All the details on Intel's 32nm Westmere chips

Intel has dropped more details of its upcoming 32nm processor line up, codenamed Westmere and featuring on-die graphics circuitry.

Rather than a wholesale architecture change, the move to 32nm is a die-shrink of the existing 45nm Nehalem architecture. Intel will start manufacturing the new chips at the end of the year, for mass release in early 2010.

"It's Nehalem upgraded. Nehalem – the largest design change – is the tock. Westmere is the tick we're announcing today," said Steve Smith, Director of Operations for Intel's Digital Enterprise Group, referring to Intel's tick-tock processing architecture strategy.

The first 32nm desktop chips will feature two cores with integrated graphics on the die. Clarkdale for the desktop and Arrandale for the thin and light market.

The 32nm Westmere processor core has been combined with a 45nm integrated integrated graphics and integrated memory controller. "Intel has had for the last decade or so, integrated graphics in our chipsets. So we're taking that, currently shipping in our 4 series chipset, and integrating that," added Smith.

Before that, though, there will be some more 45nm chips. "We have a variety of products that we expect to be shipping in the second half of 2009," said Smith. These long-awaited 45nm quad-core chips include Lynnfield for the desktop and Clarksfield for the thin and light notebook market.

The Core branding will continue, added Smith. "We're very happy with our Core branding, and you'll continue to see that as the basis for our branding."

Intel has roadmapped chips with as many as six cores (12 threads) on the desktop. "This is codenamed Gulftown at the high end of our desktop roadmap," explained Smith. That chip, due in 2010, will become the new Extreme version of the processor.

There will also be a new 5 series chipset and, in the server space, a 32nm Westmere based version of the Xeon, to replace the still-forthcoming Nehalem EX.

Better energy efficency

The new 32nm line introduces the second generation of Intel's new reduced leakage high-k and metal gate transistors with around a 22 per cent performance increase versus the 45nm generation. Current leakage has been reduced by as much as 10 per cent again.

Mark Bohr, Intel Senior Fellow, said that the move was a "revolutionary transistor technology for improved performance and lower leakage" adding that the corporation would be producing both CPU and SoC (System on Chip) variations of the Westmere line.

"SoC and mainstream CPUs have different system requirements. Developing transitiors that are tuned for [the different use]. SoC is intended for low power handheld type applications," explained Smith.

Bohr said that the 45nm transition – available in anything from single to 8 core variants – was Intel's "fastest ramp yet," twice as fast as the transition to 65nm. A wholesale new architecture, codenamed Sandy Bridge, will be next, with the move to 22nm process architecture in 2011 and 16nm in 2013.

The original 32nm SRAM Test Chip – first demonstrated over a year ago - had more than 1.9 billion transistors. And, as the transistor density is still doubling every two years, Moore's Law continues to rule the Intel roost.

Intel is prepping four US fabs for production of 32nm chips.

Asked whether the announcement reflected at all on the forthcoming Larrabee initative, Smith only added: "We are working on the Larrabee architecture."

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