Photolithography is the key to many subsequent steps involved in making the GPU, and although we're going to introduce it here, it will be used over and over again as the circuit is built up, layer by layer on the silicon wafer. It involves applying a patterned mask to the surface of the wafer so that subsequent chemical processes only affect those areas with gaps in the mask.
The letters (a) to (e) in the following description correspond to the steps in the diagram. First, a layer of photosensitive material called photoresist is applied on top of any layers that have already been created (a). This is done by putting solution on the wafer and then spinning it so the solution spreads into a thin, even layer.
When the solution has dried, the wafer is exposed to ultraviolet light (UV) through one of the masks (b). This process changes the chemical composition of the photoresist where the mask allows the ultraviolet light to pass through. The wafer is immersed in a tank of developer that dissolves away those portions of the photoresist that had been exposed to the UV light (c).
With a partial layer of photoresist now in place on the wafer, it's possible to carry out a chemical process that will only affect the wafer in those areas where the resist has that removed - we'll see an example of how this works in step 6 (d).
With the chemical process now completed, the remainder of the photoresist can be removed from the wafer using a solvent (e).
The silicon wafer will contain hundreds of individual chips, or dies to give them their correct name, so the exposure stage above (b) is carried out several times - once for each die - with the wafer being moved relative to the mask and the optical system between each exposure.
6. Patterned oxide layer
We saw in step 5 that the layer of photoresist forms a suitable barrier to many chemicals, thereby allowing a chemical process to be carried out only on portions of the wafer as defined by a mask. Other processes - most notably those involving hot gases - would destroy the photoresist, so a different type of resist is needed.
In these cases, a patterned oxide layer, otherwise known as a sacrificial oxide layer (because it's subsequently removed), is used as described in the following steps (a) to (d). Again, the letters relate to the diagram.
The wafer is covered with a layer of silicon dioxide, which completely coats all existing layers (a). The processes described in step 5 are now carried out (b), the chemical process referred to in part (d) being the dissolving of silicon dioxide using hydrofluoric acid.
The end result, therefore, is a partial layer of silicon dioxide in the pattern of the required features. The necessary chemical process is carried out - this will affect only those portions of the wafer where the patterned oxide layer is missing (c). The remnant of the oxide layer is removed, again using hydrofluoric acid (d).
7. Creating the transistors
A MOSFET (the type of transistor used in GPUs) is an electronic switch. In other words, it's an electronic component that uses a signal on one circuit to control the flow of current in another. This is the most fundamental requirement in digital electronics.
Here we see how an n-channel MOSFET is created, but p-channel MOSFETs are also required. They differ only in that one has n-type material where the other has p-type, and vice versa. In the following description, changes are made selectively to parts of the wafer by use of either a layer of photoresist as described in step 5, or a patterned oxide layer as described in step 6.
The wafer is bombarded with phosphorous ions that implant themselves into the silicon through the gaps in the photoresist to create so-called wells of n-type material. This is a modified form of silicon that has additional electrodes to carry an electrical current.
Next, two smaller islands of p-type material are created within the n-type wells - these form the two electrodes known as the source and the drain of the MOSFETs. After this, a very thin insulating layer of silicon dioxide, just a few molecules thick, is deposited on the surface of the silicon between the source and the drain.
This is done using chemical vapour deposition (CVD), a process that takes place in a furnace filled with gases to chemically modify the silicon.
Finally, again using CVD, a layer of silicon is applied over the oxide layer to create the MOSFETs' third and final electrode, which is called the gate.
8. Connecting everything
We now have a wafer comprising several dies, each of which contains billions of transistors, but to convert these from isolated components into a working circuit they have to be connected using copper tracks.
First, an insulating layer of silicon dioxide is applied to the wafer so that the interconnecting tracks don't short all the MOSFETs together. Next, holes are etched in the silicon dioxide so that connections can be made to the MOSFETs' electrodes.
Then, trenches in the shape of the tracks are etched into the silicon dioxide before a layer of copper is applied by electro-plating. This covers the entire surface of the silicon dioxide, and fills the trenches and the holes to make contact with the MOSFETs.
Finally, the excess copper is removed using a process called chemical-mechanical polishing so that copper only remains in the trenches and holes. A single layer of copper interconnections isn't nearly enough to create a viable circuit. Since it isn't possible to connect everything in a single layer without making shorts, additional layers are used, each created in the same way as the first copper layer.
Increasing the number of layers can reduce the size of the chip, and some layers have to be dedicated to providing power, so ten or more layers isn't unusual in top-end chips.
The initial manufacturing processes are now complete to the extent that the wafer will contain several hundred dies, although typically not all of them will be functional.
The next task is to test the dies one at a time. This is carried out using a sophisticated piece of equipment called a wafer prober, which makes electrical contact with microscopic pads on the dies, ensuring correct registration by use of optical image recognition techniques. In this fully automated process, the machine remembers which of the dies passed the test.
Typically, for a state-of-the-art chip, the yield (the percentage of working dies), is in the 50-60 per cent area, although this will often improve as the manufacturing methods mature.
Once the testing process is complete, the wafer is sawn up into individual dies and the non-functional ones are discarded. The final step is to take the working dies - tiny rectangles of silicon that are far too flimsy to be used as regular electronic components - and package them into what most people think of as a chip, ready to be soldered onto a circuit board.
This involves bonding the die onto a substrate, and making connections between the minuscule pads on the die and the somewhat larger solder bumps that will eventually be used to make the electrical connections on a graphics card.
A final functional test is carried out to ensure that the packing has been successful, and this miracle of digital technology is then ready to be shipped to the graphics card manufacturing facility.
We'd like to express our thanks to David Nalasco, Senior Technology Manager at AMD, who explained the intricacies of the design process to us.