New chip design could lead to smartphones with week-long battery life

(Image credit: IBM)

IBM and Samsung have announced a breakthrough in semiconductor design that could pave the way for powerful new processors with a greater transistor density than ever before.

At the annual IEDM semiconductor conference, the pair published research into a new architecture that positions transistors perpendicular to the surface of the chip, with a vertical current flow in both directions. The chip architecture is called VTFET, for vertical transport field effect transistor.

According to IBM and Samsung, the novel approach demonstrates a clear path to scaling beyond nanosheet manufacturing technology, after which the distance between transistors on a chip falls to less than 1nm (for context, a strand of human DNA is 2.5nm in diameter).

“Today’s technology announcement is about challenging convention and rethinking how we continue to advance society and deliver new innovations that improve life and reduce our environmental impact,” said Dr. Mukesh Khare, VP Hybrid Cloud and Systems at IBM Research.

“Given the constraints the industry is currently facing along multiple fronts, IBM and Samsung are demonstrating our commitment to joint innovation in semiconductor design and a shared pursuit of what we call ‘hard tech’.”

Moore’s Law lives on

The most dominant chip architectures today are known as lateral-transport field effect transistors (or FETs). Under fin field effect transistor (finFET) architecture, for example, transistors are packed onto the surface of a chip, with current flowing sideways between them. With VTFET, however, engineers have an additional dimension to play with, and current flows both upward and downward.

“In the past, designers packed more transistors onto a chip by shrinking its gate pitch and wiring pitch,” explained IBM. “But with the most advanced finFET technologies, there’s only so much room for spacers, gates and contacts.”

“[VTFET] addresses scaling barriers by relaxing physical constraints on transistor gate length, spacer thickness, and contact size so that these features can each be optimized; either for performance or energy consumption.”


A researcher at a thermal compression bonding (TCP) tool in a fabrication facility. (Image credit: IBM)

This breakthrough is significant for two primary reasons, says IBM. First, VTFET is expected to clear a path to the continuation of Moore’s Law (a prediction made in 1965 that the number of transistors on a chip will double every year), which many thought impossible. The greater the number of transistors, of course, the more powerful the chip - and ultimately the more powerful the computer, workstation, server etc.

Second, VTFET is said to allow for greater current flow with less wasted energy, which could help reduce the amount of energy consumed by chips by up to 85% as compared with traditional FETs.

In terms of real-world impact, IBM says chips built on VTFET architecture could pave the way for smartphones with a battery life of more than a week, drastically reduce the energy required to perform compute-intensive workloads (such as crypto mining and data encryption), and more.

Joel Khalili
News and Features Editor

Joel Khalili is the News and Features Editor at TechRadar Pro, covering cybersecurity, data privacy, cloud, AI, blockchain, internet infrastructure, 5G, data storage and computing. He's responsible for curating our news content, as well as commissioning and producing features on the technologies that are transforming the way the world does business.