3D X-DRAM technology will bring bigger, faster memory by 2026, but there's no way these 512GB modules will sell to consumers

• 512GB DRAM sounds huge, but don’t hold your breath for consumer availability
• NEO’s 3D X-DRAM stacks layers sky-high, but price and practicality remain unclear
• AI and enterprise systems will get the speed, regular users probably won’t

NEO Semiconductor’s push into 3D X-DRAM memory marks an ambitious attempt to rethink DRAM design for the AI and high-performance computing era.

While the promises - stacked layers, enhanced bandwidth, and reduced power consumption - are impressive, the practicality and consumer accessibility of these technologies remain open to scrutiny.

With the company projecting that its most advanced modules could reach densities of up to 512GB, it’s hard not to ask: who is this memory really for?

Complex architectures with limited consumer impact

At the core of NEO’s approach is a vertically stacked architecture that mimics the structure of 3D NAND.

In NEO’s own words, the array is “segmented into multiple sectors by vertical slits,” with “word line layers connected through staircase structures.”

The company compares its 3D X-DRAM density to the current 0a-node planar DRAM’s 48GB and claims to reach 512GB, but the implication that such capacities will trickle down into mainstream consumer products seems tenuous at best.

The proof-of-concept chips are still in the early stages. NEO is currently developing a test version of the simpler 1T0C architecture, with the more complex, and more promising, 1T1C version planned for 2026.

The 1T1C variant utilizes IGZO transistors paired with a cylindrical high-k dielectric capacitor. It promises improved retention time, reportedly beyond 450 seconds, and supports stacking up to 128 layers.

With further refinements, including the addition of 5nm-thick spacers to reduce parasitic capacitance, NEO claims stacking could exceed 512 layers.

The 3T0C design, which incorporates dual IGZO layers, is geared toward in-memory computing and AI applications.

Still, NEO’s statements about eliminating the need for TSV and enabling up to 32K-bit bus widths raise eyebrows.

Such bandwidth sounds transformative, especially compared to the projected 2K-bit bus width of HBM4, but scaling this level of performance in real-world systems is a non-trivial task.

From a broader perspective, the DRAM market hasn’t shifted significantly in terms of cost-per-GB over the past decade. Despite some fluctuations, the downward trend slowed considerably after 2012.

One might expect the MacBook Pro, for instance, to ship with far more RAM by default today than it did a decade ago, but that hasn’t happened.

Even with some price drops - DDR3 vs. DDR5 comparisons show modest improvement - the advances haven’t been revolutionary.

Commodity pricing may fluctuate, but the overall curve has flattened. Forecasts suggest we may be near a low point before another upswing.

So while 3D X-DRAM may indeed deliver bigger, faster memory by 2026, it’s unlikely these 512GB modules will be available to consumers anytime soon.

More likely, such capacity and speed will be reserved for AI servers and enterprise systems, rather than everyday desktops or laptops.

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