Intel, Samsung and Toshiba have recently teamed up to develop new ways of decreasing the size of chip technologies.
The three computing giants are aiming to try to halve semiconductor line widths to 10 nanometers by 2016, according to the Japanese Nikkei newspaper.
Samsung and Toshiba are the world's top two makers of NAND-type memory, while Intel is the the world's largest chipmaker.
Chip consortium founded
The consortium should be extended to around 10 firms all working in semiconductor materials development and manufacture.
Intel is currently working on a 32 nanometer NAND (nm – a millionth of a millimeter) process, and wants to try to shrink that down to 22nm within two years.
Speaking at this year's IDF, Intel general manager William Holt said chip making was getting increasingly more complicated the smaller the manufacturing process is becoming, hence the need for this latest co-operation in the industry.
Japan's Ministry of Economy, Trade and Industry is said to be providing $61.21 million of the $123 million towards the initial R&D fund.
Toshiba and Samsung hope to make 10 nanometer-class NAND flash memory and other chips.
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