Comparing Micron's Automata processor to GPGPU, FPGA and classic co-processors
A closer look at this new processing technology
To achieve this functionality, the Automata Processor makes heavy use of a purpose built memory architecture. In fact, the Automata Processor is one of the few semiconductor devices we are aware of the fully exploits the massive parallelism found in modern memory architectures.
This unique method for processing means that the AP is quite well suited for a specific class of problems and likewise, FPGAs are quite well suited for a different class of problem.
While it is true that there may be some overlap in application uses, the Automata Process and FPGAs are unique devices that are best suited for a different class of problem.
I will conclude this section by saying that in many cases, we believe system developers will use both the AP and an FPGA to develop high performance platforms for a wide range of applications.
In these cases the FPGA will be controlling an array of AP's as well as performing pre, intermediate and post processing of the data streams being sent to and from the AP's.
Comparison to classic coprocessors like the 487
Here again, the AP and classic coprocessors share the same basic goal; to accelerate certain functions for which the CPU is not well suited. Of course, the type of processing performed by the 487 such that it eventually led to full integration of the FPU into the CPU itself.
This is one important difference between the AP and numeric coprocessors; namely, the AP will not be subject to CPU integration for a long time.
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The reasons for this are several. First, the AP is a scalable fabric, unlike numeric coprocessors. The need for higher capacity APs is expected to continue long into the future. Right now, the first generation AP has 49,152 individual analysis units on chip. This can be considered a point in time similar to the 4,096 bit DRAM.
Just as for DRAM, the market demand for additional processing capacity will drive the AP to the largest size possible that will preclude integration with a CPU.
The second reason that the AP architecture is unlikely to be integrated into a CPU is because unlike the 487, the nature of the processing done by the AP is quite different from the instruction driven, execution pipeline oriented nature of CPUs and 487.
The AP uses a different type of data analysis architecture that is driven by data, not instructions. Having said that, it might make sense to integrate a small CPU into a large AP device.
In this way some of the pre, intermediate and post processing of information flowing to/from the AP could be conducted locally. This type of integration of a CPU into the AP, however, is not currently being planned and would most likely occur at some more mature point in the lifecycle of the AP.
Désiré has been musing and writing about technology during a career spanning four decades. He dabbled in website builders and web hosting when DHTML and frames were in vogue and started narrating about the impact of technology on society just before the start of the Y2K hysteria at the turn of the last millennium.