AMD has been granted a patent for heterogeneous microprocessors featuring two types of general-purpose cores. The technology resembles Arm’s famous Big.Little architecture and could be used for CPUs aimed at mobile and low-power devices.
The patent outlines a microprocessor featuring two types of general-purpose cores running two different subsets of the same instruction set architecture (ISA). The first type of cores is set to support a larger subset of the ISA and feature high performance, whereas the second type of simplified cores is configured to consume less power. Different types of cores can share memory locations as well as cache.
The technology enables AMD to build power-efficient processors based on x86, Arm, and other architectures (but not all at the same time) and featuring two classes of general-purpose cores.
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One important capability that AMD describes in its patents is dynamic shift of a thread from one core to another (assuming that all features are supported) if a high-performance core is underutilized or low-power core is overutilized. The method might give CPU some more freedom to balance the load of its cores with little or no intervention from an operating system, though it remains to be seen how this will work as load balancing of even homogeneous multi-core CPUs on OS side has been a performance-defining factor in the recent years.
The patent number 10,698,472 was filed on October 27, 2017, after AMD started to make and sell microprocessors running on Zen microarchitecture and years after it dropped further development of its ‘Cats’ low-power cores based on the codenamed Jaguar and Puma microarchitectures. Therefore, it is likely that AMD is considering to introduce Zen derivatives or a brand-new microarchitecture for low-power/low-cost applications.
Patent hunting is not exactly a rewarding business since companies that spend billions of US dollars on research and development file for hundreds of patents every year and far not all of the patents get implemented in real products. Microprocessors featuring different general-purpose cores have become ubiquitous in smartphones and are likely to become pervasive in mobile PCs as well. Meanwhile, it is not guaranteed that we are going to see hybrid processors like Intel’s Lakefield from AMD in the foreseeable future.
The abstract of the patent reads as follows:
“A heterogeneous processor system includes a first processor implementing an instruction set architecture (ISA) including a set of ISA features and configured to support a first subset of the set of ISA features. The heterogeneous processor system also includes a second processor implementing the ISA including the set of ISA features and configured to support a second subset of the set of ISA features, wherein the first subset and the second subset of the set of ISA features are different from each other. When the first subset includes an entirety of the set of ISA features, the lower-feature second processor is configured to execute an instruction thread by consuming less power and with lower performance than the first processor.”
Sources: Justia (opens in new tab), USPTO (opens in new tab), FPO (opens in new tab) (via Tom’s Hardware (opens in new tab))