Intel has revealed some of its latest research projects at the International Solid-State Circuits Conference in San Francisco, including an energy-efficient graphics core, and a 256-node network-on-chip.
First up is the 22nm graphics execution core, with adaptive clocking to help mitigate the impact of fast voltage droops, selective boosting for low-voltage operation of embedded register file and ROM arrays, and state-retentive sleep, which provides 10 times the leakage savings of previous chips.
The chip boasts substantial power savings, with a 2.7 times boost of gigaflops/Watt operation at near-threshold voltage, and 1.4 times higher peak gigaflops/Watt.
This chip is expected to target the mobile and handheld device sector, where achieving optimum energy efficiency remains a cat and mouse game.
A chip off the old network block
Intel is also working on a new 256-node source-synchronous network-on-chip, partly funded by the US government. This technology is designed to provide an interconnect fabric for future many-core processors.
The chip giant boasts inter-core communication bandwidth at a whopping 20.2Tb/s, with 18.3Tb/s energy efficiency at 430mV NTV and a low voltage option at 340mV, nine times lower than nominal voltage.
This chip is aimed at the big guns of computing: supercomputers and exascale machines that need hundreds of compute nodes.
Both projects are still in the research and development stage, so it may be some time before they hit the market.
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