PC processor specialist AMD has announced a new set of graphics and multimedia-friendly CPU instructions. Known as SSE5, the new instructions tie in with AMD's Fusion initiative to combine graphics and CPU functionality in a single chip.

Traditionally, it's been Intel which has released extensions to the x86 ISA upon which all current PC processors are based. Thanks to a cross licensing arrangement dating back to the 1970s, AMD typically picks up Intel's new extensions in its next CPU designs.

However, AMD does have a track record of its own. It was AMD, of course, which brought 64-bit PC processing into the mainstream by introducing the x86-64 instruction set.

The most significant aspect of the new SSE5 instructions is a wider three-operand format for vector instructions. In simple terms, the three-operand format allows processors to fuse instructions together for more rapid processing.

Single-chip solution

SSE5 also introduces a new half-precision floating point format as commonly used for graphics processing. That's very likely an addition made with AMD's CPU-GPU Fusion processors in mind.

As well as improving graphics and multimedia throughput, AMD says SSE5 will also boost so-called high-performance computing, or HPC, and security applications. Overall, the new set adds over 100 instructions to the x86 ISA.

SSE5 will make its debut in 2009 inside AMD's recently announced Bulldozer CPU core.

For any instruction set to be a success, it must be widely adopted by both Intel or AMD. That's because for the most part, software developers will only leverage instruction extensions if they are present on the majority of installed PCs.

For SSE5 to gain traction, therefore, AMD will be hoping Intel chooses to engineer it into upcoming processor designs. That plan, however, could run into problems. Intel's QuickAssist initiative suggests it intends to take a rather different approach to adding advanced 3D capabilities to the venerable x86.

According to Intel, rather than extend the x86 ISA itself, QuickAssist aims to make it easier to directly connect specialised accelerator modules to traditional general-purpose x86 CPU cores. Odds are, Intel won't be all that keen to help AMD's Fusion processors hit critical mass.