Intel has released more details on its next-generation high-performance and enterprise server Itanium chips, codenamed Poulson.
A blog post by Intel's data center group general manager Pauline Nist sheds light on the new processors, which were revealed during the Hot Chips conference at Stanford University.
The cores on the chip have been doubled to eight over its predecessor, codenamed Tukwila. A 32nm manufacturing process has been employed over Tukwila's 65nm process.
In addition, the transistor count has been upped from a meagre 2.046 billion in Tukwila to 3.1 billion in Poulson.
Three key area features were announced. Intel Instruction Reply technology uses a new pipeline architecture to capture errors in execution and correct them immediately. This is far faster than the current architecture, which completely refreshes the pipeline in the event of an error.
Improved hyper-threading technology enables independent front and backend pipeline execution to improve multi-thread efficiency.
Finally, new integer operations, expanded software prefetch and thread control mean that the Itanium architecture can "grow with future needs", according to Nist.
Although it's unlikely that the new technology will make its way into the hands of consumers, Nist notes that features "often waterfall down to subsequent generations of Xeon CPU chips", which power non-consumer servers and workstations.
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